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Digital Design Intern - Bachelors
Marvell Technology
Permanent Job
Ho Chi Minh
,
Vietnam
0-2 years
VHDL
SDC quality check
RTL
synthesis tools
C/C++
ASIC design flows
Verilog
System Verilog
MATLAB
Linux Environment
13 days ago
IC Design Intern (Analog Layout/ASIC Digital Verification)
Synopsys Inc
Permanent Job
Hanoi
,
Vietnam
0-2 years
VHDL
hardware description languages
IC design
Verification
Digital Design
systemverilog
Verilog
5 months ago
1
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