Synopsys Jobs

Analog Mixed Signal Circuit Engineer, Sr

Permanent Job

Da Nang ,

Vietnam

2-4 years

Hspice CMOS Analog design Memory high speed analog designs SNSP Custom Designer Custom logic Circuit Mixed Signal PLL/DLL Spectre Custom Sim Cadence Virtuoso IO designs Analog

5 months ago

UCIE System Engineer

Permanent Job

Da Nang ,

Vietnam

5-7 years

Hspice Memory Custom logic Circuit design Simulink communication theory Simulation Tools Mixed Signal Spectre high-speed CMOS Analog design Cshell Receiver Transmiter Perl Analog Matlab System Verilog Python

5 months ago

Junior Verification Engineer

Permanent Job

Hanoi ,

Vietnam

2-4 years

Verdi Design Verification RTL GLS coverage closure Co-simulations formal verification Functional Specifications Vcs Perl Python Tcl

5 months ago

Senior Analog Layout Engineer

Permanent Job

Hanoi ,

Vietnam

3-8 years

Mentor Calibre semiconductor fabrication processes high speed Cadence matching Latchup English Communication EMIR Esd MOSFET fundamentals Antenna Synopsys ICV Synopsys

5 months ago

Analog Design, Engineer

Permanent Job

Hanoi ,

Vietnam

1-2 years

Circuit Design High Speed macros Clock trees design quality checks data quality checks PHY Reliability Team Player verifications self-motivated Pll English Communication High Speed IOs Responsible Bandgap Analog blocks Dll Performance Function

5 months ago

Foundation IP Layout Engineer

Permanent Job

Hanoi ,

Vietnam

0-1 years

Documentation CAD tool development basic design tools communication Analytical Skills

5 months ago

Senior Analog Layout Engineer

Permanent Job

Hanoi ,

Vietnam

3-8 years

Mentor Calibre semiconductor fabrication processes high speed Cadence matching Latchup English Communication EMIR Esd MOSFET fundamentals Antenna Synopsys ICV Synopsys

5 months ago

Verification Senior Engineer

Permanent Job

Hanoi ,

Vietnam

4-6 years

System-Verilog Assertion Verdi Design Verification Uvm UPF Perl Vcs Python Tcl

5 months ago

Staff Engineer, Physical Design

Permanent Job

Ho Chi Minh ,

Vietnam

5-7 years

EM/IR-Drop/Xtalk analysis primetime Fusion Compiler Verilog Hdl Synopsys suite Cadence suite chip synthesis PT-SI Physical Verification Innovus formal verification ASIC Celtic Timing Closure AstroRail IC Compiler PrimeRail static timing analysis Apache

28 days ago

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Synopsys Jobs

Analog Mixed Signal Circuit Engineer, Sr

UCIE System Engineer

Junior Verification Engineer

Senior Analog Layout Engineer

Analog Design, Engineer

Foundation IP Layout Engineer

Senior Analog Layout Engineer

Verification Senior Engineer

Staff Engineer, Physical Design